<dec f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_drv.h' l='655' type='_Bool intel_set_cpu_fifo_underrun_reporting(struct drm_device * dev, enum i915_pipe pipe, _Bool enable)'/>
<def f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='427' ll='439' macro='1' type='_Bool intel_set_cpu_fifo_underrun_reporting(struct drm_device * dev, enum i915_pipe pipe, _Bool enable)'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='1667' u='c' c='valleyview_pipestat_irq_handler'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='1787' u='c' c='ivb_err_int_handler'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='1886' u='c' c='ilk_display_irq_handler'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='2087' u='c' c='gen8_irq_handler'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='3587' u='c' c='i8xx_irq_handler'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='3787' u='c' c='i915_irq_handler'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/i915_irq.c' l='4034' u='c' c='i965_irq_handler'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='3714' u='c' c='ironlake_crtc_enable'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='3860' u='c' c='haswell_crtc_enable'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='4419' u='c' c='valleyview_crtc_enable'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='4458' u='c' c='i9xx_crtc_enable'/>
<use f='src/src/sys/external/bsd/drm2/dist/drm/i915/intel_display.c' l='4517' u='c' c='i9xx_crtc_disable'/>
